totem pole output transistor transistor logic

The current from VCC will flow across the base resistor RB. The base-emitter voltage is less and the base-collector voltage, VBE, will be more than zero. When the input voltage is high, then transistor T1 will be in the reverse active region. Let us first consider the working of the basic TTL gate. The circuit of the basic Transistor-Transistor Logic (TTL) gate is shown in the figure below. Working of Transistor-Transistor Logic (TTL) It is also known as T 2L family and was introduced by Texas Instruments in 1964. Transistor-Transistor Logic is the most popular and widely used IC logic family. The NAND gate is the basic building block of this logic family. It is a logic family implemented with bipolar process technology that combines or integrates NPN transistors, PN junction diodes, and diffused resistors in a single monolithic structure to get the desired logic function.

TTL as outlined above stands for Transistor-Transistor Logic. Totem Pole Transistor-Transistor Logic (TTL):.Disadvantage of Single Output Stage TTL:.Working of Transistor-Transistor Logic (TTL).The operation is the same as the 2-input TTL NAND gate. It is the same as that we discussed in the 2-input TTL NAND gate circuit, except that here, the input transistor Q 1 has three emitters instead of two. The following figure shows the circuit of the standard 3-input TTL NAND gate. Circuit of standard 3-input TTL NAND Gate With Q 2 turned ON, transistor Q 4 will also be turned ON.īoth the transistors at the output side will conduct and so the output at terminal will have LOW value, which is considered as logic 0. The diode D C at the collector-base junction is forward biased.

When both the inputs A and B are high, both the diodes at the emitter-base junction will be reverse biased. The same operation will take place as explained above. When any one input, either A or B is low, the diode with low input will be forward biased.

Since Q 3 is an emitter follower, the output at the terminal will also be HIGH, which is at logic 1. With Q 2 open, the transistor Q 4 will also cut off. The supply voltage gets dropped in the resistor R 1 and it will not be sufficient to turn ON the transistor Q 2. So the current due to the supply voltage +V CC = 5 V will go to the ground through R 1 and the two diodes D A and D B. When both inputs A and B are low, both the diodes are forward biased. Diode D C represents the collector-base junction of transistor Q 2. In the figure, diodes, D A and D B represent the 2-input emitter junction of transistor Q 1.

Totem pole output transistor transistor logic